1. Field of the Invention
The invention relates to semi-conductor devices and, more particularly, to semi-conductor devices having an array of transistors connected in a predetermined arrangement.
2. Description of the Related Art
Silicon semi-conductor devices are manufactured through a series of steps carried out in a particular order. The way in which those steps are carried out is crucial to the result achieved from the manufacturing process. The main objective in manufacturing those devices is to obtain a device which conforms to geographical figures of a particular, desired design for the device. In order to obtain this objective, steps in the manufacturing process must be closely controlled to ensure that rigid requirements, for example, of exacting tolerances, quality materials, and clean environment, are met.
A wide variety of processing techniques may be employed in manufacturing silicon semi-conductor devices, such as ROM storage devices. In most devices, silicon is employed as a semi-conductor for conducting of electricity. The device manufacturing process typically begins with a silicon wafer work piece. The silicon wafer work piece is formed of a single-crystal silicon (Si). Single-crystal silicon is required because optimization of the final product device depends upon the conformance of the device through each fabrication step to particular geographic requirements. This can be better understood by further consideration of typical steps in the manufacturing process of a silicon integrated circuit device.
Beginning with a silicon wafer, a desired pattern is transferred to the surface of the wafer. This pattern may be formed on the wafer surface in a variety of manners. In many instances, a layer of silicon dioxide (SiO.sub.2, herein "oxide") is grown upon the surface of the wafer. Silicon dioxide serves as an insulative material and so is often used to separate the various semi-conducting layers of integrated circuit devices. A variety of methods may be employed to force oxide growth on the wafer, including, for example, thermal oxidation. In thermal oxidation, silicon on the wafer reacts with oxygen to form a continuous layer of high-quality silicon dioxide. A film of silicon dioxide could also be formed on the surface of a wafer in other manners.
The silicon dioxide is formed on the wafer's surface in uniform layers or in particular patterns, as desired. A variety of techniques, including, for example, photolithography, may be employed to achieve desired wafer surface configurations. In photolithography, a photo resist material, for example, a photo-sensitive polymer, may be layered atop a somewhat uniform silicon dioxide layer on a wafer surface. A mask having a desired design of clear and opaque areas may then be positioned atop the photo resist layer. Photo resist will respectively respond to UV light. As a result of this selective response characteristic of photo resist, the photo resist can be selectively subjected to UV light to form particular patterns of photo resist material atop the silicon dioxide.
Once a particular pattern of photoresist is formed atop the silicon dioxide of the wafer, portions of the wafer topped by silicon dioxide but not topped by photoresist may then be etched away from the wafer surface. Etching is a common procedure employed in manufacture of silicon integrated circuit devices. In general terms, etching is a process by which portions of a work piece may be selectively removed from the workpiece. The etch process yields a workpiece having the desired geographical arrangement, for further processing. After the etch, the photoresist is removed by a subsequent processing step, leaving the silicon wafer topped only by select configurations of silicon dioxide. As will be hereinafter more fully described, a variety of etching techniques may be employed.
In addition to the silicon dioxide/photoresist/etch method previously described, there are various other methods for selectively forming silicon dioxide atop a silicon wafer. Local oxidation, for example, is another common technique. This technique provides for selective oxide growth on a wafer and may be employed in, for example, NMOS, CMOS, and bi-polar technology. In local oxidation, a masking material, for example, silicon nitrate (Si.sub.3 N.sub.4) is layered atop the silicon wafer. Thereafter, the wafer surface is subjected to oxidation conditions. The oxidation occurs only on the exposed surfaces of the silicon wafer not covered by the silicon nitride, thus, forming the desired geographical configuration.
When a desired geographic configuration of the wafer has been obtained, the wafer is fixed with appropriate conductive paths and connections. Those conductive paths and connections may be formed in a variety of manners, for example, by deposition, diffusion, implantation, and other techniques. In deposition, materials are selectively layered atop the wafer either by chemical or physical means. Chemical means are common for depositing polycrystalline silicon (hereinafter "POLY") to form gates and connections of the silicon semi-conductor device. Diffusion, on the other hand, is a process which allows dopant atoms, for example, of boron, phosphorous, arsenic, or antimony, to move within the solid silicon of the wafer. The diffusion process occurs at an elevated temperature where there is a concentration gradient between dopant atoms external to the silicon wafer and dopant atoms diffusing into the silicon wafer and is typically employed when forming P-type and N-type regions of a silicon semi-conductor device. In another technique, implantation, electrically neutral dopant atoms are converted into ions and caused, by a collimated ion beam, to accelerate to gain high kinetic energy. These high energy ions are directed toward the silicon wafer and thereby caused to be implanted in a localized manner at a desired depth within the silicon of the wafer. A number of other techniques and combinations are also possible.
As previously alluded to herein, etching is a common technique employed at various stages of the silicon semi-conductor device manufacturing process. Various etching techniques may be employed. The techniques are characterized by their selectively for particular materials being etched and their degree of anisotrophy, i.e., anisotropic etching occurs in a single direction and isotropic etching occurs in all directions. Etching may be by chemical means, physical means, or a combination of those means. Further, etching may be either wet etching, i.e., etching takes place in a liquid, or dry etching, i.e., etching takes place in a gas. In any event, the objective in any etching process is appropriate removal of particular materials from the wafer without causing adverse damage to the wafer.
By means and particular ordering of these various steps of oxide growth, patterning, etching, deposition, diffusion, implantation, and other techniques, a desired configuration of a silicon semi-conductor device may be manufactured.
These and other manufacturing processes are used to make silicon semi-conductor devices such as ROM storage devices, programmable logic array (PLA) devices, and the like. A mask programable ROM storage device is a device which has had various messages pre-coded into the device during the manufacturing process and which cannot be changed after the ROM storage device has been manufactured. A ROM core in the ROM storage device contains an array of transistors in rows and columns which are positioned to store the pre-programmed message or data. A sensing scheme in the ROM storage device determines the pre-coded message of the ROM core at specific locations which are determined by column decode and row decode sections of the ROM storage device which receive address codes for evaluating the message or data of a specific location in the ROM core.
The data stored in the ROM storage device is programmed into the ROM core during manufacture of the ROM storage device. The ROM core has a grid of rows and columns which contain transistors connected at specific intersections depending on the data message which is programmed into the ROM core.
In manufacturing semi-conductors with transistors, decisions on whether a transistor is to be placed in a substrate or not must be made at the level where the diffusion mask is first used. The manufacturing step first using a diffusion mask is relatively early in the manufacturing process. Therefore, after a manufacturer has received the unique customer requirements for a semi-conductor device, the manufacturer must proceed through many manufacturing steps to achieve the final product.
One disadvantage to the prior art method of forming an array of transistors in a semi-conductor device is the amount of time required to manufacture the semi-conductor device after the manufacturer has received the customer's unique program requirements. Because changes to meet unique program requirements have been necessarily made at an early stage of the manufacturing process, the semi-conductors cannot be pre-prepared, save only additions needed to comply with the unique program requirements at a later step. Therefore, a customer must wait through multiple steps in the manufacturing process before delivery of a semi-conductor device manufactured to unique program requirements.